|
|
|
IMB-CNM |
26 October 2021 |
The open source hardware designed in Barcelona already has the second generation of RISC-V Lagarto processors |
Metadata |
18 October 2021 |
El BSC dissenya un xip de codi obert que triplica la velocitat del seu antecessor |
CSIC |
14 October 2021 |
El hardware de código abierto diseñado en Barcelona ya cuenta con la segunda generación de procesadores RISC-V Lagarto |
Xataca |
22 June 2021 |
España lidera la creación del primer chip europeo de código abierto: así es eProcessor, un paso adelante para competir en hardware |
Universidad de Zaragoza |
01 January 2021 |
Implementación de prebuscadores de cache para el procesador RISC-V DRAC |
HIPICS |
29 June 2020 |
DRAC project presentation at the RISC-V & OpenPOWER Workshop |
Generalitat de Catalunya |
25 May 2020 |
El BSC coordina el projecte DRAC de l'estratègia RIS3CAT finançada pel FEDER |
UAB |
11 May 2020 |
Investigadors de l'Escola d'Enginyeria participen al projecte DRAC |
FIB |
30 April 2020 |
The DRAC project is underway to manufacture a new chip and open source accelerators in Barcelona. It will be designed for safety applications, personalized medicine and autonomous driving and led by BSC. |
UPC |
15 April 2020 |
Investigadors del DAC participen al projecte DRAC (Designing RISC-V-based Accelerators for next generation Computers) |
ArchiiTecnologia |
05 April 2020 |
DRAC: se inicia el proyecto para el acelerador de código abierto |
HPC Wire |
30 March 2020 |
BSC-Led DRAC Project to Manufacture New Chip, Open Source Accelerators in Barcelona |
BSC |
30 March 2020 |
The DRAC project is underway to manufacture a new chip and open source accelerators in Barcelona |
UB |
13 March 2020 |
Projecte coordinat RIS3CAT 001-P-001723 |
La Vanguardia |
11 September 2020 |
Lagarto, un chip "made in Barcelona" |
Hardware Sfera |
30 September 2019 |
Lagarto, the processor developed entirely in Barcelona based on RISC-V |