News

[Tech] Development of a specific test platform for Sargantana
[Tech] Accelerating edit-distance sequence alignment on GPU using the Wavefront algorithm
[Tech] A Security Model for Randomization-based Protected Caches
[Tech] What’s inside the Sargantana chip?
[Tech] Sargantana, the third generation of the Lagarto processor series, submitted for fabrication via Europractice
[Tech] FPGA Acceleration of Pre-alignment Filters for Short read mapping with HLS
[Tech] A Low-Power High-Resolution Switched-Capacitor Delta-Sigma ADC IP for Edge-Computing in IoT Applications
[Tech] Lagarto KA: The High Performance Core for DRAC
[Tech] An HLS-Based HW/SW Co-Design of the Post-Quantum Classic McEliece Cryptosystem
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