News

DRAC Final Event
[Tech] New results in cache side-channel attacks and countermeasures
[Tech] Adding virtualization hardware support to Sargantana processor
[Tech] Development of a specific test platform for Sargantana
[Tech] Accelerating edit-distance sequence alignment on GPU using the Wavefront algorithm
Fifth General Meeting
[Tech] A Security Model for Randomization-based Protected Caches
[Tech] What’s inside the Sargantana chip?
[Tech] Sargantana, the third generation of the Lagarto processor series, submitted for fabrication via Europractice
Fourth General meeting