News

[Tech] Design flow: logic and physical synthesis
[Tech] An FPGA Accelerator of the Wavefront Algorithm for Genomics Pairwise Alignment
[Tech] New PLL for DVINO processor, a new member of the Lagarto RISC-V family
[Tech] DVINO, the second generation of the Lagarto processor series, submitted for fabrication via Europractice
2021 Workshop on Negative results, Opportunities, Perspectives, and Experiences
[Tech] Post-Quantum Security in the DRAC Project
DRAC holds its second online general meeting
[Tech] Low power accelerator for autonomous driving based on approximation principles
[Tech] The integration, design and manufacture of prototypes (tape-out) of DRAC processors, and the development of test platforms for these processors
[Tech] Fast gap-affine pairwise alignment using the wavefront algorithm