| ID | TITLE | STATUS |
|---|---|---|
| E1.1 | Document of the initial design of the processor and the interfaces between the different components (memory hierarchy, core and accelerators) | Download |
| E1.2 | Processor design final document | Download |
| E2.1 | Analysis of post-quantum cryptographic schemes | Internal document |
| E2.2 | Analysis of post-quantum cryptographic schemes. RISC-V extensions for virtualization and acceleration of post-quantum schemas | Internal document |
| E2.3 | Analysis of side channel attacks | Internal document |
| E2.4 | AAnalysis of post-quantum cryptographic schemes (second version). RISC-V extensions for schema virtualization and acceleration | Internal document |
| E3.1 | Report on the performance of applications and analysis pipelines in computer systems | Download |
| E3.2 | Development of an architecture simulator | Download |
| E3.3 | Report on the performance of the final design and adaptation of pipelines to new architectures | Download |
| E4.1 | Automotive Software Requirements | Download |
| E4.2 | Specification, design and implementation of the automotive accelerator | Internal document |
| E4.3 | Final implementation and evaluation of the final design of the automotive accelerator | Internal document |
| E5.1 | Report on target technology | Download |
| E5.2 | Reviewable run forecast calendar | Internal document |
| E5.3 | Final report of participation in each run | Download |
| E5.4 | Report on the development of the test platform and the characterization of the processor chips | Download |
| E6.1 | Dissemination plan | Download |
| E6.2 | Explotation plan | Internal document |
| E6.3 | First dissemination and exploitation monitoring report | Download |
| E6.4 | Second dissemination and exploitation monitoring report | Download |
| E6.5 | Third dissemination and exploitation monitoring report | Download |
Designing RISC-V-based Accelerators for next generation Computers